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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2007.10
- 수록면
- 625 - 629 (5page)
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초록· 키워드
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Due to the merits of flexibility, reduction of analog components and no aging issue of external components, digital-controlled power converter becomes very promising. It is required to derive the discrete model of power converter for digital-power control. The effect of sampling frequency of A/D converter on the digital-controlled power converter is also very essential to the performance. The objective of this paper is to present a discrete-time model of power converter for digital-controlled applications and to investigate the effect of sampling frequency of A/D converter stability and bandwidth of digital controller. It will be shown as the sampling frequency increases, the controller bandwidth can be increased to speed up the transient while reducing the phase margin. The results shown in this paper will provide a quantitative reference for digital controller design. Experimental results will be presented for confirmation.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. PROPOSED DISCRETE-TIME MODEL
Ⅲ. EFFECT OF SAMPLING FREQUENCY OF A/D CONVERTER ON CONTROLLER DESIGN
Ⅳ. EXPERIMENTAL RESULTS
Ⅴ. CONCLUSION
REFERENCES
APPENDIX: DEDUCTION OF DISCRETE-TIME MODEL
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