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자료유형
학술저널
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전력전자학회 JOURNAL OF POWER ELECTRONICS JOURNAL OF POWER ELECTRONICS Vol.8 No.4
발행연도
2008.10
수록면
363 - 370 (8page)

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초록· 키워드

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In this paper, three kinds of PWM strategies for a three-phase current-fed dc/dc converter are proposed and compared in terms of losses and voltage transfer ratio. Each PWM strategy is described graphically and their switching losses are analyzed. With the proposed PWM C strategy, one turn-off switching of each bridge switch is eliminated to reduce switching losses under the same switching frequency. In addition, RMS current through the bridge switches is lowered by using parallel connection between two bridge switches and thus, conduction losses of the switches are reduced. Further, copper losses of the transformer are decreased due to the reduced RMS current of each transformer’s winding. Therefore, total losses are minimized and the efficiency of the converter is improved by using the proposed PWM C strategy. Digital signal processor (DSP: TI320LF2407) and a field-programmable gate array (FPGA: EPM7128) board are used to generate PWM patterns for three-phase bridge and clamp MOSFETs. A 500W prototype converter is built and its experimental results verify the validity of the proposed PWM strategies.

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ABSTRACT
1. Introduction
2. Comparison of PWM Strategies
3. Calculation of Switching Losses
4. Implementation and Experimental Results
5. Conclusions
Acknowledgement
References

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