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논문 기본 정보

자료유형
학술저널
저자정보
Hyeong-Jin Choi (광운대학교) Seung-Ho Song (광운대학교) Seung-Gi Jeong (광운대학교) Ju-Yeop Choi (광운대학교) Ick Choy (광운대학교)
저널정보
전력전자학회 JOURNAL OF POWER ELECTRONICS JOURNAL OF POWER ELECTRONICS Vol.11 No.3
발행연도
2011.5
수록면
369 - 374 (6page)

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초록· 키워드

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Usually, a LPF (low pass filter) is used in the feedback loop of a SRF (synchronous reference frame) - PLL (phase locked loop) system because the measured grid voltage contains harmonic distortions and sensor noises. In this paper, it is shown that the cut-off frequency of the LPF should be designed to suppress the harmonic ripples contained in the measured voltage. Also, a new design method for the loop gain of the PI-type controller in the SRF-PLL is proposed with consideration of the dynamics of the LPF. As a result, a better transient response can be obtained with the proposed design method. The LPF frequency and the PI controller gain are designed in coordination according to the steady state and dynamic performance requirements. Furthermore, in the proposed method, the controller gain and the LPF cut-off frequency are changed from their normal value to a transient value when a voltage disturbance is detected. This paper shows the feasibility and usefulness of the proposed methods through the computer simulations and experimental results.

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Abstract
Ⅰ. INTRODUCTION
Ⅱ. DESIGN OF THE SRF-PLL SYSTEM
Ⅲ. PROPOSED VARIABLE PARAMETER PLL METHOD
Ⅳ. SIMULATION
Ⅴ. EXPERIMENTAL RESULTS
Ⅵ. CONCLUSIONS
ACKNOWLEDGMENT
REFERENCES

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