지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 저널정보
- 대한전자공학회 ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications ITC-CSCC : 2008
- 발행연도
- 2008.7
- 수록면
- 425 - 428 (4page)
이용수
초록· 키워드
오류제보하기
We developed a low-power voltage upconverter system that is composed of charge pump, level detector, and level shifter, which generates 1.0uA-10V from 2.5V VDD using 0.18um CMOS technology. The efficiency of the Dickson’s charge pump was analysed with respect to the size of pumping capacitors and the number of pumping stages, and the optimum condition was chosen from the analysis results. The level detector senses VPP voltage in capacitive division way in order to eliminate the steady state VPP power dissipation through the resistive voltage divider. The power consumption in level shifters is reduced without sacrificing the switching speed by inserting a bootstrapped p-MOSFET between cross-coupled p-MOSFET and pull down n-MOSFET. Combing the three techniques the power consumption of voltage up-converting circuit system is saved by 28%.
목차
Abstract
1. Introduction
2. Voltage Up Converter
3. Simulation Results
4. Conclusion
Acknowledgment
References
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UCI(KEPA) : I410-ECN-0101-2013-569-001139581