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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.14 No.1
- 발행연도
- 2014.2
- 수록면
- 34 - 39 (6page)
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This paper discusses the 3-level charge pumping (CP) method in planar-type Silicon-Oxide-High-k-Oxide-Silicon (SOHOS) and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) devices to find out the reason of the degradation of data retention properties. In the CP technique, pulses are applied to the gate of the MOSFET which alternately fill the traps with electrons and holes, thereby causing a recombination current Icp to flow in the substrate. The 3-level charge pumping method may be used to determine not only interface trap densities but also capture cross sections as a function of trap energy. By applying this method, SOHOS device found to have a higher interface trap density than SONOS device. Therefore, degradation of data retention characteristics is attributed to the many interface trap sites.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. EXPERIMENTAL
Ⅲ. RESULTS AND DISCUSSIONS
Ⅴ. CONCLUSIONS
REFERENCES
참고문헌 (10)
참고문헌 신청
1. [학술지(정기간행물)] - M. L. French / 1994 / Design and scaling of a SONOS multidielectric device for nonvolatile memory applications / IEEE Trans. Compon., Packag., Manuf. Technol. A 17 (3) : 390 ~ 397
2. [학술지(정기간행물)] - J. K. Bu / 2001 / Design considerations in scaled SONOS nonvolatile memory devices / Solid-State Electron. 45 (1) : 113 ~ 120
3. [학술지(정기간행물)] - H. Wann / 1995 / High endurance ultrathin tunnel oxide in MONOS device structure for dynamic memory applications / IEEE Electron Device Lett. 16 : 491 ~ 493
4. [학술지(정기간행물)] - Y. Kamagaki / 1989 / Yield and reliability of MNOS EEPROM products / IEEE J. Solid-State Circuits 24 : 1714 ~ 1722
5. [학술대회논문] - T. Ishida / 2006 / Characterization of charge traps in metal-oxidenitride-oxide-semiconduct (MONOS) structure for embedded flash memories / IEEE Annu. Int. Rel. Phys. Symp. : 516 ~ 522
2. [학술지(정기간행물)] - J. K. Bu / 2001 / Design considerations in scaled SONOS nonvolatile memory devices / Solid-State Electron. 45 (1) : 113 ~ 120
3. [학술지(정기간행물)] - H. Wann / 1995 / High endurance ultrathin tunnel oxide in MONOS device structure for dynamic memory applications / IEEE Electron Device Lett. 16 : 491 ~ 493
4. [학술지(정기간행물)] - Y. Kamagaki / 1989 / Yield and reliability of MNOS EEPROM products / IEEE J. Solid-State Circuits 24 : 1714 ~ 1722
5. [학술대회논문] - T. Ishida / 2006 / Characterization of charge traps in metal-oxidenitride-oxide-semiconduct (MONOS) structure for embedded flash memories / IEEE Annu. Int. Rel. Phys. Symp. : 516 ~ 522
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