지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 발행연도
- 2013.12
- 수록면
- 425 - 436 (12page)
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초록· 키워드
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As processing nodes scale up, it is difficult for traditional electronic networks to supply on-chip communication efficiently due to unacceptable latency, plus power and area consumption. Alternative interconnects, such as radio frequency interconnect (RF-I) and optical interconnect, have been explored as interconnection backbones. Hybrid hierarchical architectures with both traditional interconnects and emerging interconnects have been widely adopted to get excellent trade-off between latency and power. The hybrid hierarchical architecture with a wireless/RF-I backbone is more cost-efficient and feasible due to advantages in complementary metal oxide semiconductor compatibility, compared with other alternative interconnects, and has become one of the mainstreams of chip multi-processor systems. However, how to efficiently utilize the wireless/RF-I backbone is a new challenge for designers. Based on analysis of existing typical hybrid hierarchal wireless/RF-I architectures (HHWAs), the key problems in the Design of HHWAs are proposed here, and related potential solutions are provided. In particular, strategies for resource management of wireless/RF-I are explored in detail, and different solutions are discussed. This work is expected to serve as a basis for future HHWA designs.
목차
Abstract
Introduction
RF-I/Wireless
Hybrid Hierarchical Wireless/RF-I Architectures
Wireless/RF-I Resource Management
Key Problems in HHWA Design
Conclusion
References
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UCI(KEPA) : I410-ECN-0101-2015-500-002466675