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논문 기본 정보

자료유형
학술저널
저자정보
Bor-Ren Lin (National Yunlin University of Science and Technology) Chih-Chieh Chen (National Yunlin University of Science and Technology)
저널정보
대한전기학회 Journal of Electrical Engineering & Technology Journal of Electrical Engineering & Technology Vol.9 No.5
발행연도
2014.9
수록면
1,632 - 1,642 (11page)

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초록· 키워드

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This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at Vin/2 voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switching frequency scheme is used to control the output voltage. The resonant circuit is operated at the inductive load. Thus, the input current of the resonant circuit is lagging to the fundamental input voltage. Power MOSFETs can be turn on under zero voltage switching. Two resonant circuits are connected in parallel to reduce the current stress of transformer windings and rectifier diodes at low voltage side. Interleaved pulse-width modulation is adopted to decrease the output ripple current. Finally, experiments are presented to demonstrate the performance of the proposed converter.

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Abstract
1. Introduction
2. Circuit Configuration
3. Operation Principle
4. System Analysis
5. Design Example and Experimental Results
6. Conclusion
References

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