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논문 기본 정보

자료유형
학술저널
저자정보
Bor-Ren Lin (National Yunlin University of Science and Technology) Jeng-Yu Chen (National Yunlin University of Science and Technology)
저널정보
대한전기학회 Journal of Electrical Engineering & Technology Journal of Electrical Engineering & Technology Vol.10 No.1
발행연도
2015.1
수록면
128 - 137 (10page)

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초록· 키워드

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A novel parallel three-level zero voltage switching (ZVS) DC converter is presented for medium voltage applications. The proposed converter includes three sub-circuits connected in parallel with the same power switches to share load current and reduce the current stress of passive components at the output side. Thus, the size of the output chokes is reduced and the switch counts in the proposed converter are less that in the conventional parallel three-level DC/DC converter. Each sub-circuit combines one half-bridge converter and one three-level converter. The transformer secondary windings of these two converters are connected in series in order to reduce the size of output inductor. Due to the three-level circuit topology, the voltage stress of power switches is equal to V<SUB>in</SUB>/2. Based on the resonant behavior by the output capacitance of power switches and the leakage inductance (or external inductance) at the transition interval, each switch can be turned on under ZVS. Finally, experiments based on a 2 kW prototype are provided to verify the performance of the proposed converter.

목차

Abstract
1. Introduction
2. Circuit Configuration
3. Operation Principle
4. Circuit Characteristics
5. Experimental Results
6. Conclusion
References

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