지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 발행연도
- 2013.11
- 수록면
- 91 - 94 (4page)
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초록· 키워드
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A low power CMOS voltage reference using body effect and switched-capacitor technique is presented in this paper. The output voltage is produced by the gate-source voltage. The MOSFETs are working on subthreshold region thus the power consumption is greatly reduced. By utilizing the switchedcapacitor technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-㎛ CMOS technology. The output voltage is 117.68 ㎷, and the temperature coefficient is less than 50.0 ppm/℃ ranging from -40 ℃ to 80 ℃. The voltage line-sensitivity is 0.19 %/V ranging from 1.2 V to 3.2 V. The average current consumption is about 95 nA.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. PROPOSED SCVR STRUCTURE AND OPERATING PRINCIPLE
Ⅲ. CIRCUIT CONFIGURATION
Ⅳ. SIMULATION RESULTS
Ⅴ. CONCLUSION
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2016-569-001048534