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논문 기본 정보

자료유형
학술저널
저자정보
Byoung-Soo Choi (Kyungpook National University) Eunsu Shin (DGIST) Myunghan Bae (Kyungpook National University) Sang-Hwan Kim (Kyungpook National University) Jimin Lee (Kyungpook National University) Sang-Ho Seo (Kyungpook National University) Jang-Kyoo Shin (Kyungpook National University)
저널정보
대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.17 No.6
발행연도
2017.12
수록면
854 - 861 (8page)
DOI
10.5573/JSTS.2017.17.6.854

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초록· 키워드

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Various circuits and devices are integrated on the CMOS image sensor (CIS) chip. Sources of power consumption in the CIS include source followers of the pixel array, bias circuits, driving circuits, a noise canceller, and readout circuits. In this paper, a low-power complementary metal oxide semiconductor (CMOS) image sensor based on variable frame rate operation is proposed. Power consumption of bias circuits and source followers of the pixel array is reduced by the variable frame rate operation in the proposed CIS. In most cases, the constant bias current continuously flows through the bias circuits and source followers even if the frame rate is changed. However, results indicate that using the variable frame rate operation reduces the constant bias current of the proposed CIS. Results also indicate that the power consumption is reduced by lowering the frame rate without significant image degradation.

목차

Abstract
I. INTRODUCTION
II. OPERATING PRINCIPLE
III. RESULTS AND DISCUSSIONS
IV. CONCLUSIONS
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UCI(KEPA) : I410-ECN-0101-2018-569-001737990