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논문 기본 정보

자료유형
학술저널
저자정보
Yuehai Wang (North China University of Technology) Yuying Ma (North China University of Technology) Shiming Cui (North China University of Technology) Yongzheng Yan (North China University of Technology)
저널정보
대한전기학회 Journal of Electrical Engineering & Technology Journal of Electrical Engineering & Technology Vol.13 No.6
발행연도
2018.11
수록면
2,485 - 2,492 (8page)

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초록· 키워드

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The rapid development of large-scale integrated circuits has brought great challenges to the circuit testing and diagnosis, and due to the lack of exact fault models, inaccurate analog components tolerance, and some nonlinear factors, the analog circuit fault diagnosis is still regarded as an extremely difficult problem. To cope with the problem that it’s difficult to extract fault features effectively from masses of original data of the nonlinear continuous analog circuit output signal, a novel approach of feature extraction and dimension reduction for analog circuit fault diagnosis based on wavelet packet decomposition, local linear embedding algorithm, and clone selection algorithm (WPD-LLE-CSA) is proposed. The proposed method can identify faulty components in complicated analog circuits with a high accuracy above 99%. Compared with the existing feature extraction methods, the proposed method can significantly reduce the quantity of features with less time spent under the premise of maintaining a high level of diagnosing rate, and also the ratio of dimensionality reduction was discussed. Several groups of experiments are conducted to demonstrate the efficiency of the proposed method.

목차

Abstract
1. Introduction
2. Method
3. The Framework Based on WPD-LLE-CSA
4. Experimental Results and Analysis
5. Conclusion
References

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UCI(KEPA) : I410-ECN-0101-2018-560-003535848