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학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.20 No.6
- 발행연도
- 2020.12
- 수록면
- 518 - 525 (8page)
- DOI
- 10.5573/JSTS.2020.20.6.518
이용수
초록· 키워드
오류제보하기
A successive approximation register (SAR) analog-to-digital converter (ADC) with input offset calibration is proposed to reduce input offset mismatches between multiple ADCs. The proposed input offset calibration is performed by controlling the capacitors used for scaling the input range of the SAR ADC in the capacitor digital-to-analog converter (CDAC) without the addition and modification of analog circuits. To verify the proposed input offset calibration, a 10-bit 10-MS/s SAR ADC with asynchronous architecture is implemented by using a 180-nm CMOS process with a supply voltage of 1.8 V. The power consumption and active area of the implemented SAR ADC are 2.29 mW and 0.207 ㎟, respectively. The control logic circuits added for the proposed input offset calibration occupy an area of 0.032 ㎟. The proposed input offset calibration of the SAR ADC reduces the input offset of ten LSBs to less than that of three LSBs. The measured DNL and INL are +0.60/−0.94 LSBs and +0.89/−0.93 LSBs, respectively. The ENOB is measured to 9.29 bits for the analog input signal with Nyquist frequency.
목차
Abstract
I. INTRODUCTION
II. ASYNCHRONOUS SAR WITH INPUT OFFSET CALIBRATION USING CDAC
III. CHIP IMPLEMENTATION AND MEASUREMENT RESULTS
IV. CONCLUSIONS
REFERENCES
참고문헌 (11)
참고문헌 신청
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S. Liu, T. Rabuske, J. Paramesh, L. Pileggi, and J. Fernandes, “Analysis and Background Self- Calibration of Comparator Offset in Loop-Unrolled SAR ADCs,” IEEE Trans. Circuits and Systems I: Regular Papers, vol. 65, no. 2, pp. 458-470, Feb. 2018.
H.-J. In and O.-K. Kwon, “External compensation of nonuniform electrical characteristics of thin-film transistors and degradation of OLED devices in AMOLED displays,” IEEE Electron. Device Lett., vol. 30, no. 4, pp. 377-379, Apr. 2009.
J.-S. Bang, H.-S. Kim, K.-D. Kim, O.-J. Kwon, C.- S. Shin, J. Lee, and G.-H. Cho, “A Hybrid AMOLED Driver IC for Real-Time TFT Nonuniformity Compensation,” IEEE J. Solid-State Circuits, vol. 51, no. 4, pp. 966-978, Apr. 2016.
J-H. Kim, H.-W. Lee, K.-J. Min, and Y.-J. Son, “THRESHOLD VOLTAGE SENSING CIRCUIT OF ORGANIC LIGHT-EMITTING DIODE DISPLAY DEVICE,” US Patent 9,620,053 B2, Apr. 2017.
S. Liu, T. Rabuske, J. Paramesh, L. Pileggi, and J. Fernandes, “Analysis and Background Self- Calibration of Comparator Offset in Loop-Unrolled SAR ADCs,” IEEE Trans. Circuits and Systems I: Regular Papers, vol. 65, no. 2, pp. 458-470, Feb. 2018.
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