지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.20 No.1
- 발행연도
- 2020.2
- 수록면
- 99 - 104 (6page)
- DOI
- 10.5573/JSTS.2020.20.1.099
이용수
초록· 키워드
오류제보하기
This paper proposes a 12-bit 180 MS/s current-steering digital-to-analog converter (DAC) with cascaded local-element matching (C-LEM) schemes to significantly reduce the required number of current cells in the DAC to 28, a reduction of 99.32 % compared to the amount of required in the conventional 12-bit full thermometer-coded switching techniques. The bias circuits in the DAC use simple source follower-based level shifters to obtain the required bias voltages, simplifying the circuit configuration considerably. The prototype DAC shows the measured differential non-linearity (DNL) and integral non-linearity (INL) within 0.50 LSB and 0.78 LSB, respectively. The DAC achieves a peak spurious-free-dynamic range (SFDR) of 65.33 dB at 180 MS/s. The output current and total power of the prototype DAC are 10 mA and 38.2 mW, with analog and digital power supplies of 3.3 V and 1.8 V, respectively.
목차
Abstract
I. INTRODUCTION
II. ARCHITECTURE
III. CIRCUIT DESCRIPTION
IV. MEASUREMENT RESULTS
V. CONCLUSIONS
REFERENCES
참고문헌 (18)
참고문헌 신청
F. T. Chou, et al, “A novel 12-bit current-steering DAC with two reference currents,” Circuits and Systems, 2015. ISCAS 2015. Digest of Technical Papers. IEEE International Symposium on, 24-27, pp. 1022-1025, Jul., 2015.
J. Park, S. C. Lee, and S. H. Lee, “3 V 10-bit 70 MHz D/A converter for video applications,” Electron. Letters, Vol. 35, No. 24, pp. 2071-2073, Nov., 1999.
M.-H. Shen, and P.-C. Huang, “A Low Cost Calibrated DAC for High-Resolution Video Display System,” Very Large Scale Integration Systems, IEEE Transactions on, Vol. 20, No. 9, pp. 1743-1747, Sep., 2012.
H. Lee, and J. Kim, “A 12-bit 220 MS/s Areaefficient DAC in 65nm CMOS with Calibration- DAC Assisted Linearity Enhancement,” Semiconductor and Technology and Sience, Journal of, Vol. 18, No. 4, pp. 433-437, Agu., 2018.
R. Liu, and L. Pileggi, “Low-Overhead Self- Healing Methodology for Current Matching in Current-Steering DAC,” Circuits and Systems II, IEEE Transactions on, Vol. 62, No. 7, pp. 651-655, Jul., 2015.
J. Park, S. C. Lee, and S. H. Lee, “3 V 10-bit 70 MHz D/A converter for video applications,” Electron. Letters, Vol. 35, No. 24, pp. 2071-2073, Nov., 1999.
M.-H. Shen, and P.-C. Huang, “A Low Cost Calibrated DAC for High-Resolution Video Display System,” Very Large Scale Integration Systems, IEEE Transactions on, Vol. 20, No. 9, pp. 1743-1747, Sep., 2012.
H. Lee, and J. Kim, “A 12-bit 220 MS/s Areaefficient DAC in 65nm CMOS with Calibration- DAC Assisted Linearity Enhancement,” Semiconductor and Technology and Sience, Journal of, Vol. 18, No. 4, pp. 433-437, Agu., 2018.
R. Liu, and L. Pileggi, “Low-Overhead Self- Healing Methodology for Current Matching in Current-Steering DAC,” Circuits and Systems II, IEEE Transactions on, Vol. 62, No. 7, pp. 651-655, Jul., 2015.
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