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연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 발행연도
- 2016.12
- 수록면
- 19 - 24 (6page)
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초록· 키워드
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Along the few nano sizing dimensions of integrated circuit (IC) devices, acceptable interlayer material for design is inevitable. The interlayer which include dielectric, interconnect, barrier etc. needs to achieve not only electrical properties, but also mechanical properties for endure post manufacture process and prolonging life time. For developing intermetallic dielectric (IMD) the mechanical issues with post manufacturing processes were need to be solved. For analyzing specific structural problem and material properties Raman spectroscopy was performed for various researches in Si semiconductor based materials. As improve of the laser and charge-coupled device (CCD) technology the total effectiveness and reliability was enhanced. For thin film as IMD developed material could be analyzed by Raman spectroscopy, and diverse researches of developing method to analyze thin layer were comprehended. Also In-situ analysis of Raman spectroscopy is introduced for material forming research.
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참고문헌 (36)
참고문헌 신청
L. Wilson / 2013 / International technology roadmap for semiconductors (ITRS) / Semiconductor Industry Association
K. Maex / 2003 / Low dielectric constant materials for microelectronics / J. Appl. Phys 93(11):8793
A. Grill / 2014 / Progress in the development and understanding of advanced low k and ultralow k dielectrics for very largescale integrated interconnects-State of the art / Appl. Phys. Rev 1(1):011306
김은솔 / 2012 / 웨이퍼 레벨 3D Integration을 위한 Ti/Cu CMP 공정 연구 / 마이크로전자 및 패키징학회지 19(3):37~41
J. C. Lam / 2013 / Evidence of ultra-low-k dielectric material degradation and nanostructure alteration of the Cu/ultra-low-k interconnects in time-dependent dielectric breakdown failure / Appl. Phys. Lett 102(2):022908
K. Maex / 2003 / Low dielectric constant materials for microelectronics / J. Appl. Phys 93(11):8793
A. Grill / 2014 / Progress in the development and understanding of advanced low k and ultralow k dielectrics for very largescale integrated interconnects-State of the art / Appl. Phys. Rev 1(1):011306
김은솔 / 2012 / 웨이퍼 레벨 3D Integration을 위한 Ti/Cu CMP 공정 연구 / 마이크로전자 및 패키징학회지 19(3):37~41
J. C. Lam / 2013 / Evidence of ultra-low-k dielectric material degradation and nanostructure alteration of the Cu/ultra-low-k interconnects in time-dependent dielectric breakdown failure / Appl. Phys. Lett 102(2):022908
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