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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.23 No.5
- 발행연도
- 2023.10
- 수록면
- 314 - 321 (8page)
- DOI
- 10.5573/JSTS.2023.23.5.314
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초록· 키워드
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This paper presents the design and fabrication of a low-power incremental delta-sigma analog-to-digital converter (ADC) with an adaptive bias technique suitable for complimentary metaloxide semiconductor (CMOS) image sensors (CISs). The adaptive biasing circuitry provides the amplifier with a predicted minimum current value required for the integrator output to settle; this optimized current flows through the amplifier and reduces power consumption by 40%. A prototype ADC fabricated using a 0.18 μm CMOS process, achieves an SNDR of 65 dB at a sampling frequency of 25 MHz and consumes 13.5 μW from a 1.8 V power supply. The measured differential and integral nonlinearities are +0.31/-0.42 and +0.62/-0.75 at a 12-bit accuracy, respectively.
목차
Abstract
I. INTRODUCTION
II. ADAPTIVE BIASING TECHNIQUE
III. CIRCUIT DESCRIPTION
IV. MEASUREMENT RESULTS
V. CONCLUSIONS
REFERENCES
참고문헌 (17)
참고문헌 신청
S. K. Mendis, B. Pain, R. H. Nixon, and E. R. Fossum, “Design of low- light-level image sensor with an on-chip sigma-delta analog-to-digital conversion,” in Proc. SPIE, 1993, vol. 1900, pp. 31-39.
J. Nakamura, B. Pain, T. Nomoto, T. Nakamura, and E. R. Fossum, “On-focal-plane processing for current-mode active pixel sensors,” IEEE Trans. Electron. Devices, vol. 44, pp. 1747-1758, Oct. 1997.
A. Agah, K. Vleugels, P. B. Griffin, M. Ronaghi, J. D. Plummer and B. A. Wooley, "A High-Resolution Low-Power Oversampling ADC with Extended-Range for Bio-Sensor Arrays," 2007 IEEE Symposium on VLSI Circuits, Kyoto, Japan, 2007, pp. 244-245, doi: 10.1109/
Y. Chae et al., “A 2.1 M pixels, 120 frame/s CMOS image sensor with column-parallel ΔΣ ADC architecture,” IEEE J. Solid-State Circuits, vol. 46, no. 1, pp. 236-247, Jan. 2011.
J. Yeo, Y. Choi, J. Roh, G. Han, Y. Chae and S. Ham, "A Current Regulator for Inverter-Based Massively Column-Parallel Delta Sigma ADCs," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 61, no. 4, pp. 224-228, April 2014, doi: 10.110
J. Nakamura, B. Pain, T. Nomoto, T. Nakamura, and E. R. Fossum, “On-focal-plane processing for current-mode active pixel sensors,” IEEE Trans. Electron. Devices, vol. 44, pp. 1747-1758, Oct. 1997.
A. Agah, K. Vleugels, P. B. Griffin, M. Ronaghi, J. D. Plummer and B. A. Wooley, "A High-Resolution Low-Power Oversampling ADC with Extended-Range for Bio-Sensor Arrays," 2007 IEEE Symposium on VLSI Circuits, Kyoto, Japan, 2007, pp. 244-245, doi: 10.1109/
Y. Chae et al., “A 2.1 M pixels, 120 frame/s CMOS image sensor with column-parallel ΔΣ ADC architecture,” IEEE J. Solid-State Circuits, vol. 46, no. 1, pp. 236-247, Jan. 2011.
J. Yeo, Y. Choi, J. Roh, G. Han, Y. Chae and S. Ham, "A Current Regulator for Inverter-Based Massively Column-Parallel Delta Sigma ADCs," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 61, no. 4, pp. 224-228, April 2014, doi: 10.110
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