CubicPlan : Logic 설계자를 위한 계층적 Floorplanning 시스템

장명수 ,  진훈상 ,  이진용 외 2명

대한전자공학회 학술대회

1997 .07

Next Generation Floorplanning & Hierarchical Planning

윤원효

대한전자공학회 학술대회

2008 .05

Techniques for Placement and Floorplanning

Hyun Chul Shin

ICVC : International Conference on VLSI and CAD

1993 .01

A Floorplanning for Blocks with Flexible Aspect Ratio

Y. Y. H. Lam ,  C. C. Jong ,  C. T. Lee 외 1명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1993 .01

A Floorplanning Scheme for VLSI Design

Takashi Kambe ,  Tsuneo Tomita

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1988 .01

On Objective Functions for Fixed-Outline Floorplanning

Lu Wang ,  Xiaolin Zhang ,  Song Chen 외 2명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2008 .07

A Floorplanning Algorithm Using Force-Directed Block Shaping

Sang Gil Choi ,  Chong Min Kyung

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1991 .01

Iterative Application of Behavioral Synthesis and Floorplanning for Asynchronous Circuits with Bundled-data Implementation

Naohi ,  o Hamada ,  Hi 외 1명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2009 .07

A GA-based Floorplanning method for Topological Constraint

Masaya Yoshikawa ,  Hidekazu Te ,  ai

제어로봇시스템학회 국제학술대회 논문집

2005 .06

An Efficient Algorithm for Floorplanning of High-Speed VLSI Circuits Using Hierarchical Clustering with Fuzzy Theory

Akino ,  i Kanasugi ,  Shuji Sato 외 2명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1993 .01

Simultaneous Allocation and Floorplanning Based on Mixed Integer Linear Programming

Shoichi ,  o Yamada

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1993 .01

Thermal-Aware Floorplanning with Min-cut Die Partition for 3D ICs

Cheoljon Jang ,  Jong-wha Chong

[ETRI] ETRI Journal

2014 .08

A New Implementation of Multilevel Framework for Interconnect-Driven Floorplanning

Zheng Xu ,  Song Chen ,  Takeshi Yoshimu 외 2명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2008 .07

Voltage Island Partitioning Based Floorplanning Algorithm

Kim ,  Jae-Hwan ,  Chong 외 1명

전기전자학회논문지

2012 .09

Floorplanning을 이용한 지연시간 추정 기법

류정수 ,  김원종 ,  신현철

한국정보과학회 학술발표논문집

1998 .04

계층 논리 기반 전문가 시스템에 관한 연구

朴永文 ,  金光源 ,  李光浩 외 1명

전기학회논문지

1998 .11

Logic Simulation

권태욱

대한전자공학회 단기강좌

1983 .01

A Parallel Simulated Annealing Algorithm for LSI Floorplanning Running on Multicore Processors

Tomoaki SATO ,  Masato INAGI ,  Shinobu NAGAYAMA 외 1명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2009 .07

계층적 논리 회로의 시뮬레이션 ( Simulation for Hierarchical Logic Network )

이홍주 ,  허용민 ,  이주희 외 3명

대한전자공학회 학술대회

1988 .07