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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 저널정보
- 대한전자공학회 ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications ITC-CSCC : 2008
- 발행연도
- 2008.7
- 수록면
- 181 - 184 (4page)
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초록· 키워드
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This paper presents the architecture of transform circuit that can support multiple video CODEC standards such as JPEG, MPEG-1/2/4, H.264 and VC-1. The proposed architecture exploits the similarity of 4-point and 8-point DCT’s based on the permutation matrices. Since our circuit accepts the transform coefficients from the users, it can be extended very easily to cover any kind of DCTbased transforms for future standards. We described the proposed transform circuit at RTL and verified its operation on FPGA board.
목차
Abstract
1. Introduction
2. Proposed Architecture of High-Performance Transform Circuit
3. Circuit Implementation and Results
4. Conclusions
Acknowledgement
References
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UCI(KEPA) : I410-ECN-0101-2013-569-001138973