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논문 기본 정보

자료유형
학술저널
저자정보
Hyun-Yeop Lee (Korea Aerospace University) Jin-Seop Lee (Korea Aerospace University) Chang-Kyun Noh (Korea Aerospace University) Ho-Jin Kang (Korea Aerospace University) Seong-Tae Kim (Korea Aerospace University) Ho-Seon Baek (Korea Aerospace University) Young-Jin Kim (Korea Aerospace University) Choon-Sik Cho (Korea Aerospace University)
저널정보
한국전자파학회JEES Journal of Electromagnetic Engineering And Science Journal of Electromagnetic Engineering And Science Vol.22 No.2
발행연도
2022.3
수록면
129 - 137 (9page)

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초록· 키워드

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In this paper, an energy-efficient switching scheme with additional quarter-reference voltage sources in a successive approximation register (SAR) analog-to-digital converter (ADC) is proposed for a low power and small area device for frequency modulated continuous wave (FMCW) radar transceivers. Recently, state-of-the-art ADCs have adopted a configuration that also uses V<SUB>ref</SUB>/2 as the reference voltage of the ADCs to improve the switching energy of capacitive digital-to-analog converter (CDAC). The proposed switching configuration additionally uses V<SUB>ref</SUB>/4 and 3V<SUB>ref</SUB>/4 reference voltages as the reference voltage of CDAC. Compared to state-of-the-art configurations that use the additional reference voltage of V<SUB>ref</SUB> /2, the average switching energy, and the total capacitance of CDAC in the proposed configuration are reduced by about 87.5% and 50%, respectively. In this switching scheme, the CDAC output voltage gradually converges to V<SUB>ref</SUB>/2, like with conventional SAR ADCs, which minimizes the dynamic offset that deteriorates the linearity of the SAR ADC.

목차

Abstract
I. INTRODUCTION
II. ARCHITECTURE & CIRCUIT DESCRIPTION
III. CALCULATION OF SWITCHING ENERGY
IV. CIRCUIT IMPLEMENTATION
V. CONCLUSION
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