지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전기학회 Journal of Electrical Engineering & Technology Journal of Electrical Engineering & Technology Vol.3 No.1
- 발행연도
- 2008.3
- 수록면
- 130 - 134 (5page)
이용수
이 논문의 연구 히스토리 (2)
- 이 논문의 후속연구가 궁금하신가요?
- 연관 학술논문 또는 학술발표를 통해 보다 발전된 연구결과를 확인하실 수 있습니다.
- 이 논문의 연구 히스토리 확인하기
초록· 키워드
오류제보하기
The increasing size of very large scale integration (VLSI) circuits, high transistor density, and popularity of low-power circuit and system design are making the minimization of power dissipation an important issue in VLSI design. Test Power dissipation is exceedingly high in scan-based environments wherein scan chain transitions during the shift of test data further reflect into significant levels of circuit switching unnecessarily. Scan chain or cell modification lead to reduced dissipations of power. The ETC algorithm of previous work has weak points. Taking all of this into account, we therefore propose a new algorithm. Its name is RE_ETC. The proposed modifications in the scan chain consist of Exclusive-OR gate insertion and scan cell reordering, leading to significant power reductions with absolutely no area or performance penalty whatsoever. Experimental results confirm the considerable reductions in scan chain transitions. We show that modified scan cell has the improvement of test efficiency and power dissipations.
목차
Abstract
1. Introduction
2. Previous Work
3. Proposed Methodology
4. Experimental Results
5. Conclusion
Acknowledgements
References
참고문헌 (19)
참고문헌 신청
1. [학술지(정기간행물)] - Laung-Terng Wang / 2006 / VLSI Test Principles and Architectures, Design For Testability / Elsevier Inc
2. [학술대회논문] - Ozgur Sinanoglu / 2002 / Scan Power Reduction Through Test Data Transition Frequency Analysis / International Test Conference : 844 ~ 850
3. [학술대회논문] - Ozgur Sinanoglu / 2002 / Test Power Reduction Through Minimization of Scan Chain Transitions / Proceedings of the 20th IEEE VLSI Test Symposium
4. [학술대회논문] - Abhijit Ghosh / 1992 / Estimation of Average Switching Activity in Combinational and Sequential Circuits / 29th ACM/IEEE Design Automation Conference : 253 ~ 259
5. [단행본] - M. L. Bushnell / 2000 / Essentials of Electronic Testing / Academic publishers
2. [학술대회논문] - Ozgur Sinanoglu / 2002 / Scan Power Reduction Through Test Data Transition Frequency Analysis / International Test Conference : 844 ~ 850
3. [학술대회논문] - Ozgur Sinanoglu / 2002 / Test Power Reduction Through Minimization of Scan Chain Transitions / Proceedings of the 20th IEEE VLSI Test Symposium
4. [학술대회논문] - Abhijit Ghosh / 1992 / Estimation of Average Switching Activity in Combinational and Sequential Circuits / 29th ACM/IEEE Design Automation Conference : 253 ~ 259
5. [단행본] - M. L. Bushnell / 2000 / Essentials of Electronic Testing / Academic publishers
함께 읽어보면 좋을 논문
논문 유사도에 따라 DBpia 가 추천하는 논문입니다. 함께 보면 좋을 연관 논문을 확인해보세요!
-
Efficient Low-power Scan Test Method based on Exclusive Scan and Scan Chain Reordering
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2020 .08
-
Four-Dynamic Partitioning of Scan Chains for Low Peak Power
ICEIC : International Conference on Electronics, Informations and Communications
2010 .06
-
A New Scan Chain Fault Simulation for Scan Chain Diagnosis
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2007 .12
-
Master-Slave 기법을 적용한 System Operation의 동작 검증
전기학회논문지
2009 .01
-
A Low Power Scan Design Architecture
대한전자공학회 ISOCC
2004 .10
-
Dynamically Changeable Secure Scan Architecture against Scan-Based Side Channel Attack
대한전자공학회 ISOCC
2012 .11
-
Functional-power-aware Partial Gating Method for Low Power Scan-shift
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2018 .02
-
A Novel High Performance Scan Architecture with Dmuxed Scan Flip-Flop (DSF) for Low Shift Power Scan Testing
Journal of Electrical Engineering & Technology
2009 .12
-
IEEE 1149.1 표준에 근거한 다중 클럭을 이용한 단일 캡쳐 스캔 설계에 적용되는 경계 주사 테스트 기법에 관한 연구
전기학회논문지
2007 .05
-
Operation about Multiple Scan Chains based on System-on-Chip
대한전자공학회 ISOCC
2008 .11
-
Line Scanning Performance 향상에 관한 연구
한국통신학회 학술대회논문집
1994 .07
-
삽입 실시간 디스크 스케줄링기법과 양방향 SCAN기법
한국정보과학회 학술발표논문집
2004 .10
-
A New Low Power Scan Architecture Considering Test Data Compression
대한전자공학회 ISOCC
2006 .10
-
C-Scan 초음파 영상 컬러화 및 용접 품질 자동 평가 시스템
멀티미디어학회논문지
2018 .11
-
피니싱 장비의 스캔 장치 특성 실험
한국정밀공학회 학술발표대회 논문집
2015 .05
-
BIST 환경에서의 천이 억제 스캔 셀 구조
전자공학회논문지-SD
2006 .06
-
Power on The Fly 를 이용한 수율 향상 스캔 테스트
한국정밀공학회 학술발표대회 논문집
2016 .05
-
Scan chain swapping using TSVs for test power reduction in 3D-IC
대한전자공학회 ISOCC
2013 .11
-
전류 밀도 측정을 위한 스캔 장치 설계
한국정밀공학회 학술발표대회 논문집
2015 .12
이 논문의 저자 정보
이 논문과 함께 이용한 논문
최근 본 자료
댓글(0)
0
UCI(KEPA) : I410-ECN-0101-2010-560-001638199