New Dynamic Logic Gate Design Method for Improved TFT Circuit Performance

Jeong ,  Ju-Young ,  Kim 외 1명

Journal of information display

2005 .01

Synthesis of Complementary Pass Gate Network for a Quaternary Logic Function and Its Application

Kyu Ik Sohng ,  Michitaka Kameyama ,  Tatsuo Higuchi

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1988 .01

A Design of Variable Logic Circuits Using Neuron MOS Transistor

T.Momiyama ,  M.Inui ,  H.A 외 4명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2005 .07

Design of a Complementary Pass Gate Network for a Multiple-Valued Logic System

Kyu Ik Sohng ,  Kazuhi ,  o Ho 외 3명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1987 .01

Logic Gate간의 상호 연결도 검증 ( Verification of Logic Gate Interconnectivity )

정자춘 ,  경종민

대한전자공학회 학술대회

1985 .01

Comparative Study on the Structural Dependence of Logic Gate Delays in Double-Gate and Triple-Gate FinFETs

Kwan Young Kim ,  Jae Man Jang ,  Dae Youn Yun 외 2명

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE

2010 .06

Characteristics of Gate Structure in Junctionless Double Gate Field Effect Transistors

Myeongsun Kim ,  Il Hwan Cho

대한전자공학회 학술대회

2019 .06

Design of Quaternary Logic gate Using Double Pass-transistor Logic with neuron MOS Threshold gate

Pa ,  k ,  Soo-Jin 외 4명

전기전자학회논문지

2004 .07

CAD를 이용한 1차원 MOSㆍLSI GATE 배열의 방법

조중휘 ,  정정화 ,  임인칠

한국정보과학회 학술발표논문집

1982 .04

LOGIC-CHECKER : A CORRECTING FUNCTION FOR GATE ERRORS IN LOGIC SIMULATION AND ITS IMPLEMENTATION

Satoshi Wakabayashi ,  Hi ,  oyuki Ishikawa 외 1명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1989 .01

뉴런 모스 기반의 4치 논리게이트를 이용한 동기식 4치 카운터 설계

최영희 ,  윤병희 ,  김흥수

전자공학회논문지-SD

2005 .03

A Rule-Based System for VLSI Gate-level Logic Optimization

Seong Bong Lee ,  Jong Hwa Chong

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1988 .01

Intense-pulsed-UV-converted perhydropolysilazane gate dielectrics for organic field-effect transistors and logic gates

백한솔 ,  김민제 ,  백정주 외 4명

한국고분자학회 학술대회 연구논문 초록집

2019 .04

Insulated Gate Transistor의 설계 및 제작 ( Design and Fabrication of the Insulated Gate Transistors )

김진형 ,  최연익

대한전자공학회 학술대회

1987 .11

2-bit/Cell Split Gate Flash Memory with Double Gate

2-bit/Cell Split Gate Flash Memo ,  y with Double Gat ,  Il Han Pa 외 5명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2007 .07

New Logic Simulation by the Gate-Level Waveform Relaxation Method

Ki Jun Lee

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1988 .01

Junctionless Sandwiched-gate Logic Design using Novel Device Structure

Myunghwan Ryu ,  Youngmin Kim

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE

2018 .08

Electron Injection Characteristics of an Adaptive Device Using a Split-Gate MOS Transistor

최승욱 ,  신장규 ,  Eiji Io 외 2명

대한전자공학회 학술대회

1998 .01

A Universal Gate for Combinational Design of QCA Circuits

Young Bok Kim ,  Yong-Bin Kim ,  F. Lomba 외 1명

대한전자공학회 ISOCC

2009 .11

A Design of an Optimal Mixture Circuit Using Neuron MOS Transistor and CMOS Transistor

M.Inui ,  H.A ,  aki 외 3명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

2003 .07