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논문 기본 정보

자료유형
학술저널
저자정보
Chang-Yong Lee (Kumoh National Institute of Technology) Young-Hyung Kim (Kumoh National Institute of Technology) Yong-Hwan Lee (Kumoh National Institute of Technology)
저널정보
한국정보기술학회 JOURNAL OF ADVANCED INFORMATION TECHNOLOGY AND CONVERGENCE Journal of Advanced Information Technology and Convergence Vol.9 No.1
발행연도
2019.7
수록면
115 - 125 (11page)
DOI
10.14801/jaitc.2019.9.1.115

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In this paper, the image is received from the camera and the lane is sensed. There are various ways to detect lanes. Generally, the method of detecting edges uses a lot of the Sobel edge detection and the Canny edge detection. The minimum use of multiplication and division is used when designing for the hardware configuration. The images are tested using a black box image mounted on the vehicle. Because the top of the image of the used the black box is mostly background, the calculation process is excluded. Also, to speed up, YCbCr is calculated from the image and only the data for the desired color, white and yellow lane, is obtained to detect the lane. The median filter is used to remove noise from images. Intermediate filters excel at noise rejection, but they generally take a long time to compare all values. In this paper, by using addition, the time can be shortened by obtaining and using the result value of the median filter. In case of the Sobel edge detection, the speed is faster and noise sensitive compared to the Canny edge detection. These shortcomings are constructed using complementary algorithms. It also organizes and processes data into parallel processing pipelines. To reduce the size of memory, the system does not use memory to store all data at each step, but stores it using four line buffers. Three line buffers perform mask operations, and one line buffer stores new data at the same time as the operation. Through this work, memory can use six times faster the processing speed and about 33% greater quantity than other methods presented in this paper. The target operating frequency is designed so that the system operates at 50MHz. It is possible to use 2157fps for the images of 640by360 size based on the target operating frequency, 540fps for the HD images and 240fps for the Full HD images, which can be used for most images with 30fps as well as 60fps for the images with 60fps. The maximum operating frequency can be used for larger amounts of the frame processing.
#image processing #parallel processing #pipeline structure #median filter #Sobel edge detection #lane detection #YCbCr #Verilog #HDL

목차

Abstract
1. Introduction
2. Related Works
3. RGB to YCbCr
4. Blurring
5. Edge Detection
6. Hardware Design
7. Result
8. Conclusion
References

참고문헌 (11)

참고문헌 신청
김광백 / 2017 / Real Time Road Lane Detection with RANSAC and HSV Color Transformation / Journal of Information and Communication Convergence Engineering 15(3):187~192 Crossref Li Houqiang / 2017 / Two-stage hough transform algorithm for lane detection system based on TMS320DM6437 / Proc. of the 2017 IEEE International Conference on Imaging Systems and Techniques (IST) 2007 :1~5 google schola B. Ahirwal / 2007 / FPGA based System for Color Space Transformation RGB to YIQ and YCbCr / Proc. of the International Conference Intelligent and Advanced Systems(ICIAS) :1345~1349 google schola A. M. Sapkal. / 2008 / R'G'B' to Y'CbCr Color Space Conversion using FPGA / Proc. of the 2008 Institution of Engineering and Technology (IET) International Conference on Wireless, Mobile and Multimedia Networks :255~258 google schola V. Balaji / 2014 / FPGA based Low Complexity Multipurpose Reconfigurable Image Processor / Proc. of the International Conference Information Communication and Embedded Systems (ICICES) :1~6 google schola

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