지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.23 No.3
- 발행연도
- 2023.6
- 수록면
- 189 - 195 (7page)
- DOI
- 10.5573/JSTS.2023.23.3.189
이용수
초록· 키워드
오류제보하기
An integrate-and-fire (I&F) neuron circuit effectively integrates input currents with a small magnitude onto a membrane capacitor until a threshold is reached in hardware spiking neural network (SNN). I&F neuron circuits can be adopted in the large-scale array of synaptic devices to convert analog inputs to a digital output for altering the synaptic weights. The area occupied by the neuron circuits needs to be reduced and the sizes of capacitors can be controlled for the goal. In this study, an effort is made for improving the area efficiency of an I&F neuron circuit by controlling the shunt capacitor through a series of circuit simulations. 0.35-μm technology has been assumed to be utilized for designing the neuron circuits in variation with shunt capacitor. In the end, the dependence of spiking behaviors of an I&F neuron circuit on the area control over capacitors is closely examined.
목차
Abstract
I. INTRODUCTION
II. NEURON CIRCUIT DESIGN
III. EFFECTS OF THE SECONDARY CAPACITOR
IV. CONCLUSION
REFERENCES
참고문헌 (24)
참고문헌 신청
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M. Kwon, M. Baek, S. Hwang, K. Park, T. Jang, T. Kim, J. Lee, S. Cho, and B.-G. Park, “Integrateand-fire neuron circuit using positive feedback field effect transistor for low power operation,” J. Appl. Phys., vol. 124, no. 15, pp. 152107-01-152107-07, Se
Y. J. Lee, et al., “Low power real time electronic neuron VLSI design using subthreshold technique,” Proc. IEEE Int. Symp. Circuits Syst., vol. 4, p. IV-744, May 2004.
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T. Masquelier and S. J. Thorpe, “Unsupervised learning of visual features through spike timing dependent plasticity,” PLoS Comput. Biol., vol. 3, no. 2, pp. 1-11, Feb. 2007.
M. Kwon, M. Baek, S. Hwang, K. Park, T. Jang, T. Kim, J. Lee, S. Cho, and B.-G. Park, “Integrateand-fire neuron circuit using positive feedback field effect transistor for low power operation,” J. Appl. Phys., vol. 124, no. 15, pp. 152107-01-152107-07, Se
Y. J. Lee, et al., “Low power real time electronic neuron VLSI design using subthreshold technique,” Proc. IEEE Int. Symp. Circuits Syst., vol. 4, p. IV-744, May 2004.
D. Kuzum, S. Yu, and H.-S. P. Wong, “Synaptic electronics: materials, devices and applications,” Nanotechnol., vol. 24, no. 38, pp. 382001-1-382001-22, Sep. 2013.
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