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Potential Possibility of Reducing Parasitic Inductance of Power Module by paralleling Lead Frame Terminals
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Lead Frame 단자의 병렬성을 활용한 파워 모듈 기생 인덕턴스 저감 가능성 연구

논문 기본 정보

Type
Proceeding
Author
Kyung Tae Min (한양대학교) Won Seung Hyun (한양대학교) Sang Won Yoon (한양대학교)
Journal
The Institute of Electronics and Information Engineers 대한전자공학회 학술대회 2023년도 대한전자공학회 하계학술대회 논문집
Published
2023.6
Pages
197 - 200 (4page)

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Potential Possibility of Reducing Parasitic Inductance of Power Module by paralleling Lead Frame Terminals
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Abstract· Keywords

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This paper investigates the possibility to reduce parasitic inductance of power modules by adding an additional Lead Frame Terminal. With the advent of WBG semiconductor materials, parasitic components have become more important with the increased switching speed. For this reason, it is critical to reduce parasitic inductance in a power module that is one of the reliable packaging approaches for high-voltage power semiconductor package. This study attempts to reduce parasitic inductance and switching loss by adding more Lead Frame Terminals in power modules.

Contents

Abstract
Ⅰ. 서론
Ⅱ. 파워 모듈 모델
Ⅲ. 기생 인덕턴스 추출
Ⅳ. 인버터 회로 시뮬레이션
Ⅴ. 결론 및 향후 연구 전망
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