지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.18 No.6
- 발행연도
- 2018.12
- 수록면
- 730 - 736 (7page)
- DOI
- 10.5573/JSTS.2018.18.6.730
이용수
초록· 키워드
오류제보하기
This paper presents a low-voltage low-power CMOS fractional-N PLL synthesizer for 2.4-GHz ISMband Bluetooth applications. A single LC VCO with a 5-bit capacitor array bank provides a tuning range between 1.82 and 2.53 GHz to generate wideband LO signals. The PLL is also featured with a 25% duty-cycle quadrature LO generator. Two-point differential injection VCO is designed and the modulated spectrum is verified. Fabricated in 65 nm CMOS, the PLL synthesizer dissipates 3.8 mW from 1 V supply. Measured phase noise is -80.1 and -107 dBc/Hz at 100 kHz and 1 MHz offset, respectively.
목차
Abstract
I. INTRODUCTION
II. PLL SYNTHESIZER DESIGN
III. IMPLEMENTATION RESULTS
V. CONCLUSIONS
REFERENCES
참고문헌 (20)
참고문헌 신청
F.-W. Kuo, S. B. Ferreira, H.-N. R. Chen, L.-C. Cho, C.-P. Jou, F.-L. Hsueh, I. Madadi, M. Tohidian, M. Shahmohammadi, M. Babaie, R. B. Staszewski, A Bluetooth Low-Energy Transceiver With 3.7-mW All-Digital Transmitter, 2.75-mW High-IF Discrete-Time Receiver, and TX/RX Switchable On-Chip Matching Network, IEEE J. of Solid-State Circuits, vol. 52, no. 4, pp. 1144- 1162, Apr. 2017
Y.-H. Liu, C. Bachmann, X. Wang, Y. Zhang, A. Ba, B. Busze, M. Ding, P. Harpe, G.-J. V. Schaik, G. Selimis, H. Giesen, J. Gloudemans, A. Sbai, H. Huang, H. Kato, G. Dolmans, K. Philips, H. D. Groot, A 3.7mW-RX 4.4mW-TX Fully Integrated Bluetooth Low-Energy/IEEE802.15.4/Proprietary SoC with an ADPLL-Based Fast Frequency Offset Compensation in 40nm CMOS, in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2015, pp. 236-237
C. Weltin-Wu, E. Temporiti, M. Cusmai, D. Baldi, F. Svelto, Insights Into Wideband Fractional ADPLLs: Modeling and Calibration of Nonlinearity Induced Fractional Spurs, IEEE Tran. Circuits and Systems-I Reg. Papers, vol. 57, no. 9, pp. 2259-2268, Sep. 2010
S.-A. Yu, P. Kinget, A 0.65V 2.5GHz Fractional- N Frequency Synthesizer in 90nm CMOS, in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2007, pp. 304-305
L. L. K. Leung, H. C. Luong, A 1-V 9.7-mW CMOS Frequency Synthesizer for IEEE 802.11a Transceivers, IEEE Tran. Microw. Theory Tech., vol. 56, no.1, pp. 39-48, Jan. 2008
함께 읽어보면 좋을 논문
논문 유사도에 따라 DBpia 가 추천하는 논문입니다. 함께 보면 좋을 연관 논문을 확인해보세요!
-
A CMOS Receiver Front-end with Fractional-N PLL Synthesizer for MedRadio Applications
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2018 .12
-
UHF FRS 대역 CMOS PLL 주파수 합성기 설계
한국전자파학회논문지
2017 .12
-
Initial Frequency Preset Technique for Fast Locking Fractional-N PLL Synthesizers
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2017 .08
-
CMOS 120 GHz Phase-Locked Loops Based on Two Different VCO Topologies
Journal of Electromagnetic Engineering And Science
2017 .04
-
IoT 어플리케이션을 위한 저전력 위상 고정 루프 설계
대한전자공학회 학술대회
2024 .11
-
A 5.8-㎓ CMOS Fractional-N Frequency Synthesizer Using Quadrature VCO for DSRC application
대한전자공학회 학술대회
2020 .08
-
광대역 주입동기식 주파수 분주기 기반 40 GHz CMOS PLL 주파수 합성기 설계
한국전자파학회논문지
2016 .08
-
10 GHz - to - 14GHz LC VCO Based Charge-Pump PLL With 40nm Low Power CMOS Technology
대한전자공학회 학술대회
2019 .06
-
166MHz 위상 고정 루프 기반 주파수 합성기
전기전자학회논문지
2022 .12
-
MICS 대역 RF 송신기를 위한 65nm CMOS PLL 주파수 합성기
대한전자공학회 학술대회
2016 .11
-
A Low-voltage Low-power Wideband CMOS VCO with Robust Sub-band Switching Technique
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2018 .12
-
IEEE 802.15.4g SUN 시스템용 RF 주파수 합성기의 구현
전자공학회논문지
2016 .12
-
A 10.2-GHz LC-VCO for a 28-nm CMOS Transmitter With Nearest VCO-curve Selection Algorithm
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2020 .06
-
A CMOS Charge Pump Circuit with Short Turn-on Time for Low-spur PLL Synthesizers
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2016 .12
-
A Low Phase Noise 5.6GHz Frequency Synthesizer with A linear transconductance VCO for 5G applications
대한전자공학회 학술대회
2016 .11
-
W-대역 탐지 송수신기용 CMOS 위상 동기 루프 설계
전자공학회논문지
2020 .01
-
12.2 GHz All-digital PLL with Pattern Memorizing Cells for Low Power/low Jitter using 65 nm CMOS Process
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2021 .04
-
94 GHz SiGe BiCMOS PLL의 고온 특성 평가 및 분석
한국전자파학회논문지
2023 .10
-
Design of Low Phase Noise VCO for 5G mmWave PLL
INTERNATIONAL CONFERENCE ON FUTURE INFORMATION & COMMUNICATION ENGINEERING
2023 .01
-
A Dual-loop Phase Locked Loop with Frequency to Voltage Converter
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2019 .06
이 논문의 저자 정보
이 논문과 함께 이용한 논문
Proton-irradiation Effects on Charge Trapping-related Instability of Normally-off AlGaN/GaN Recessed MISHFETs
Dongmin Keum
,
Hyungtak Kim
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2019
.04
Xenon Flash Lamp Annealing on a-IGZO Thin-film Transistors at Different Pulse Repetition Numbers
Kee Hyun Kim
,
Hyuck-In Kwon
,
Sang Jik Kwon
외 1명
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2019
.04
Analysis of Random Telegraph Noise Characteristics with Two Different Cell States in 3-D NAND Flash Memory
Nagyong Choi
,
Ho-Jung Kang
,
Jong-Ho Lee
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2019
.04
The Reinforcement Learning based Local Routing Optimization for Ad-hoc Network
Yongsu Lee
,
Jongchan Woo
,
Hoi-Jun Yoo
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2019
.02
최근 본 자료
댓글(0)
0