지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.19 No.6
- 발행연도
- 2019.12
- 수록면
- 551 - 560 (10page)
- DOI
- 10.5573/JSTS.2019.19.6.551
이용수
초록· 키워드
오류제보하기
In this work, an analytical DC compact model of tunneling field-effect transistor (TFET) with higher accuracy is presented. Non-local band-to-band tunneling current equation in the device simulation equips density of states (DOS) and Fermi-Dirac distribution of carriers, and the electrical parameters are extracted from the device simulation and fed into the circuit-level simulation. All the equations with the full set of coefficients obtained from the device simulations are have been encoded by Verilog-A and implanted in the HSPICE. Along with the abrupt switching subthreshold and on-state current characteristics, ambipolar current characteristics in the negative gate bias region has been also precisely described in this work. The device and circuit simulation results have demonstrated plausibly good agreement and the developed model will be of great practical use in the digital and analog circuit designs.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. DEVICE STRUCTURE AND PHYSICS
Ⅲ. CORRECTIONS FOR HIGHER ACCURACY
Ⅳ. RESULTS AND DISCUSSION
Ⅴ. CONCLUSION
REFERENCES
참고문헌 (31)
참고문헌 신청
A. M. Ionescu and H. Riel, “Tunnel field-effect transistors as energy-efficient electronic switches,” Nature, vol. 479, no. 7373, pp. 329-337, Nov. 2011.
S. Datta, H. Liu, and V. Narayanan, “Tunnel FET technology: A reliability perspective,” Microelectron. Reliab., vol. 54, no. 5, pp. 861-874, May 2014.
D. Esseni, M. Pala, P. Palestri, C. Alper, and T. Rollo, “A review of selected topics in physics based modeling for tunnel field-effect transistors,” Semicond. Sci. Technol., vol. 32, no. 8, pp. 083005- 1 - 083005-27, Jul. 2017.
D. Abdi and M. J. Kumar, “Controlling Ambipolar Current in Tunneling FETs Using Overlapping Gate-on-Drain,” IEEE J. Electron Devices Soc., vol. 2, no. 6, pp. 187-190, May 2014.
J. Lee, R. Lee, S. Kim, E. Park, H.-M. Kim, K. Lee, S. Kim, and B.-G. Park, “Fabrication Methods for Nanowire Tunnel FET with Locally Concentrated Silicon-germanium Channel,” J. Semicond. Technol. Sci., vol. 19, no. 1, pp. 18-23, Feb. 2019.
S. Datta, H. Liu, and V. Narayanan, “Tunnel FET technology: A reliability perspective,” Microelectron. Reliab., vol. 54, no. 5, pp. 861-874, May 2014.
D. Esseni, M. Pala, P. Palestri, C. Alper, and T. Rollo, “A review of selected topics in physics based modeling for tunnel field-effect transistors,” Semicond. Sci. Technol., vol. 32, no. 8, pp. 083005- 1 - 083005-27, Jul. 2017.
D. Abdi and M. J. Kumar, “Controlling Ambipolar Current in Tunneling FETs Using Overlapping Gate-on-Drain,” IEEE J. Electron Devices Soc., vol. 2, no. 6, pp. 187-190, May 2014.
J. Lee, R. Lee, S. Kim, E. Park, H.-M. Kim, K. Lee, S. Kim, and B.-G. Park, “Fabrication Methods for Nanowire Tunnel FET with Locally Concentrated Silicon-germanium Channel,” J. Semicond. Technol. Sci., vol. 19, no. 1, pp. 18-23, Feb. 2019.
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