지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.20 No.5
- 발행연도
- 2020.10
- 수록면
- 423 - 429 (7page)
- DOI
- 10.5573/JSTS.2020.20.5.423
이용수
초록· 키워드
오류제보하기
In this paper, a CMOS tunable channel-selection low-noise amplifier (LNA) that employs an active feedback technique and gain-boosted N-path bandpass filter (BPF) is presented for advanced cellular applications. The proposed LNA achieves broadband input power matching and low noise figure (NF) performance by using the active feedback technique. The gain-boosted N-path BPF is also used to implement a high-Q RF fourth-order bandpass filtering. Simulated in a 65-㎚ CMOS process, the proposed LNA achieves a maximum voltage gain of 17 ㏈, minimum NF of 2.16 ㏈, maximum out-of-band blocker rejection ratio of 21 ㏈ at 80 ㎒ offset frequency. The center-frequency tuning range of the LNA is 0.1 ‒ 4 ㎓, which includes all FDD bands in the 3G/4G/5G sub-6 ㎓ cellular standards. It draws a DC bias current of 21 ㎃ from a supply voltage of 1.2 V. The active die area is 0.8 ㎟.
목차
Abstract
I. INTRODUCTION
II. PROPOSED CHANNEL-SELECTION LNA WITH ACTIVE FEEDBACK AND GAIN- BOOSTED N-PATH BPF
III. SIMULATION RESULTS
IV. CONCLUSION
REFERENCES
참고문헌 (18)
참고문헌 신청
T. Kim et al., “CMOS channel-selection low-noise amplifier with high-Q RF band-pass/band-rejection Filter for highly integrated RF front-ends,” IEEE Microw. Compon. Lett., vol. 30, no. 3, pp. 280-283, March 2020.
B. Van Liempd et al., “A +70-dBm IIP3 electricalbalance duplexer for highly integrated tunable front-ends,” IEEE Trans. Microw. Theory Techn., vol. 64, no. 12, pp. 4274-4286, Dec. 2016.
I. Fabiano et al., “A +25-dBm IIP3 1.7-2.1-GHz FDD receiver front end with integrated hybrid transformer in 28-nm CMOS,” IEEE Trans. Microw. Theory Techn., vol. 65, no. 11, pp. 4677- 4688, Nov. 2017.
K. Son et al., “A dual-band CMOS tunable duplexer employing switchable autotransformer for highly integrated RF front-ends,” IEEE Microw. Compon. Lett., vol. 29, no. 7, pp. 495-497, July 2019.
K. Kwon et al., “A hybrid transformer-based CMOS duplexer with a single-ended notch-filtered LNA for highly integrated tunable RF front-ends,” IEEE Microw. Compon. Lett., vol. 28, no. 11, pp. 1032-1034, Nov. 2018
B. Van Liempd et al., “A +70-dBm IIP3 electricalbalance duplexer for highly integrated tunable front-ends,” IEEE Trans. Microw. Theory Techn., vol. 64, no. 12, pp. 4274-4286, Dec. 2016.
I. Fabiano et al., “A +25-dBm IIP3 1.7-2.1-GHz FDD receiver front end with integrated hybrid transformer in 28-nm CMOS,” IEEE Trans. Microw. Theory Techn., vol. 65, no. 11, pp. 4677- 4688, Nov. 2017.
K. Son et al., “A dual-band CMOS tunable duplexer employing switchable autotransformer for highly integrated RF front-ends,” IEEE Microw. Compon. Lett., vol. 29, no. 7, pp. 495-497, July 2019.
K. Kwon et al., “A hybrid transformer-based CMOS duplexer with a single-ended notch-filtered LNA for highly integrated tunable RF front-ends,” IEEE Microw. Compon. Lett., vol. 28, no. 11, pp. 1032-1034, Nov. 2018
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