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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 저널정보
- 대한전자공학회 ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications ITC-CSCC : 2008
- 발행연도
- 2008.7
- 수록면
- 217 - 220 (4page)
이용수
초록· 키워드
오류제보하기
A Multiple-Threshold CMOS (MTCMOS) is one of the techniques which reduce leakage power while keeping high performance of LSI. Static Timing Analysis (STA) is an established technique to estimate the delay of circuits. In MTCMOS circuits, the conventional STA cannot be applied. Due to wire resistance of the virtual ground line and channel-resistance of Power-Switch (PS) transistors, the fall delay deviates from that of a CMOS circuit without PS. In addition, the delay is changed by overlapping of discharge currents from each gate. In this paper, we propose a PS clustering technique that makes STA in MTCMOS circuits possible. We create a circuit structure such that the discharge currents from gates do not overlap with each other. Experimental results show that the proposed STA-approach allows us to estimate the delay of the MTCMOS circuit within approximately 12% error.
목차
Abstract
Ⅰ. Introduction
Ⅱ. Proposed STA approach for PS-shared MTCMOS circuits
Ⅲ. Experimental results
Ⅳ. Conclusions and future work
Acknowledgments
References
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