지원사업
학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
커뮤니티
연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
등록된 정보가 없습니다.
논문 유사도에 따라 DBpia 가 추천하는 논문입니다. 함께 보면 좋을 연관 논문을 확인해보세요!
바이오 센서 적용을 위한 수직형 이중게이트 InGaAs TFET의 게이트 열화 현상 분석
센서학회지
2022 .01
터널링 전계효과 트랜지스터 4종류 특성 비교
한국정보통신학회논문지
2017 .05
Effects of Pillar Conditions on DC/AC Characteristics of Tunnel Field-effect Transistor with Vertical Structures
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2021 .08
Triple-gate Tunnel FETs Encapsulated with an Epitaxial Layer for High Current Drivability
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2017 .04
A Vertical Gate-Source Overlapped TFET (Tunneling Field effect Transistor) for Ultra Low Power Application
ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications
2015 .06
Investigation of Feasibility of Tunneling Field Effect Transistor (TFET) as Highly Sensitive and Multi-sensing Biosensors
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2017 .02
Switching Performance Investigation of a Gate-All-Around Core-Source InGaAs/InP TFET
Transactions on Electrical and Electronic Materials
2021 .08
시뮬레이션을 통한 TFET 소자에서의 Source-to-Gate Underlap/Overlap 길이에 따른 특성 변화 연구
대한전자공학회 학술대회
2016 .11
Contact Resistance Reduction between Ni–InGaAs and n-InGaAs via Rapid Thermal Annealing in Hydrogen Atmosphere
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2017 .04
InGaAs-based Tunneling Field-effect Transistor with Stacked Dual-metal Gate with PNPN Structure for High Performance
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2017 .04
Electrical Characteristics of Tunneling Field-effect Transistors using Vertical Tunneling Operation Based on AlGaSb/InGaAs
Journal of Electrical Engineering & Technology
2017 .11
Compact Capacitance Model of L-Shaped Tunneling Field-effect Transistors
INTERNATIONAL CONFERENCE ON FUTURE INFORMATION & COMMUNICATION ENGINEERING
2021 .02
n-InGaAs MOSFETs을 위한 Pd 중간층을 이용한 Ni-InGaAs의 열 안정성 개선
전기전자재료학회논문지
2018 .03
Capacitance model of Single-Gate Tunneling Field-Effect Transistors for Circuit Simulation
INTERNATIONAL CONFERENCE ON FUTURE INFORMATION & COMMUNICATION ENGINEERING
2017 .06
Design Optimization of L-Shaped Gate Negative Capacitance Si/Ge Heterojunction TFET With Channel Doping
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
2025 .02
Compact Current Model of Single-Gate/Double-Gate Tunneling Field-Effect Transistors
Journal of Electrical Engineering & Technology
2017 .09
General SPICE Modeling Procedure for Double-Gate Tunnel Field-Effect Transistors
Journal of information and communication convergence engineering
2016 .06
Characteristics and optimization of reverse structured two source region tunnel TFET
대한전자공학회 학술대회
2019 .06
Reduction of Contact Resistance Between Ni-InGaAs Alloy and In0.53Ga0.47As Using Te Interlayer
Transactions on Electrical and Electronic Materials
2017 .10
Si, Ge과 Si-Ge Hetero 터널 트랜지스터의 라인 터널링과 포인트 터널링에 대한 연구
한국정보통신학회논문지
2017 .05
0